This application contains subject matter similar to that disclosed in U.S. patent application Ser. No. 09/677,845, filed on Oct. 3, 2000.
1. Field of the Invention
The present invention relates to a method for performing inspection and analysis of electrical contacts and associated vias of electrical and electronic devices. More particularly, the present invention pertains to an improved method of sample preparation for performing X-ray analysis and inspection of xe2x80x9cflip-chipxe2x80x9d and/or ball grid contact arrays (xe2x80x9cBGAxe2x80x9d) and their associated internal vias, such as are utilized in semiconductor integrated circuit (xe2x80x9cICxe2x80x9d) devices and circuit boards therefor, for determination of offset or misalignment, voids, and layer separation (i.e., delamination).
2. Background of the Invention
An increasingly important aspect of semiconductor IC manufacturing technology is mounting of the semiconductor IC chip or die to an appropriate substrate. Frequently, this requires providing the chip or die with as many input/output (xe2x80x9cI/Oxe2x80x9d) terminals as is possible. As a consequence of the requirement for a large number of terminals to be formed on a limited amount of chip or die surface, so called xe2x80x9cflip-chipxe2x80x9d structures and bonding techniques have been developed in order to provide high areal density interconnections between the IC chip or die and the substrate.
According to flip-chip methodology, the IC chip or die is mounted via direct bonding to a package substrate, e.g., an organic polymer-based or ceramic package substrate. Generally, the flip-chip process entails disposing a plurality of raised contacts, e.g., in the form of solder balls or bumps, on the upper major surface of the chip or die (termed a ball grid array, xe2x80x9cBGAxe2x80x9d), wherein the solder balls or bumps may overlie and connect with internal vias of the IC device. The IC chip or die is then xe2x80x9cflippedxe2x80x9d over so that the solder balls or bumps face and are mated with a corresponding ball grid array (BGA) or bonding pads on the substrate surface, which BGA or bonding pads may also overlie and electrically contact internal vias of the substrate for electrically connecting underlying metallization levels, patterns, etc. Once mated, the solder bumps or balls of the IC die or chip and the corresponding solder bumps or balls or bonding pads of the substrate are heated to effect reflow and mutual bonding, whereby each solder ball or bump forms a bond between the chip or die and the substrate. As a consequence, each bonded combination functions as both an electrical and physical contact.
According to flip-chip methodology, electrically conductive balls or bumps comprising a solder material are formed on the IC chip or die, as well as on the mating surface of the substrate. Bonding between the two sets of solder balls or bumps is effected by application of heat to the chip or die and the substrate. The application of heat causes both sets of solder-based balls or bumps to reflow, thereby providing physical and ohmic connection therebetween.
Flip-chip contact arrangements, such as described above, are susceptible to exhibiting poor ohmic contact performance and/or poor physical bonding, in extreme instances leading to device failure. Poor ohmic resistance and/or poor physical bonding may result from a number of factors, including, inter alia, offset or misalignment of the solder ball or bump forming the external, raised contact, and the underlying internal via structure; presence of voids in the ball/via structure, whether arising during manufacture or subsequent thereto as a result of, e.g., electromigration of one or more metallic elements or components thereof; and layer separation, i.e., delamination, oxidation and/or disbonding of e.g., the solder ball or bump and the underlying via due to compositional differences which result in poor mutual adhesion.
As a consequence of the above-described several possible, but distinct, scenarios or mechanisms leading to poor performance of BGA and flip-chip contact/via structures, inspection and/or failure analysis is generally necessary for determining the particular mechanism responsible for poor performance or failure of a particular device or component. However, methodology for performing simple, reliable, and rapid sample reparation for visual or X-ray radiographic failure analysis and/or inspection of a particular area-of-interest (AOI) of a BGA or flip-chip array with associated underlying vias is presently unavailable. Moreover, a convenient method for performing high magnification, visual and/or X-ray inspection and/or analysis of an AOI of a BGA or flip-chip array of either or both of a semiconductor IC chip or die and circuit board therefor, is similarly presently unavailable.
Accordingly, there exists a need for improved methodology for simple, reliable, and rapid sample preparation for facilitating performing high magnification level, visual and/or X-ray radiographic inspection and/or analysis of solder ball/underlying via structures of a particular AOI of a semiconductor IC chip or die or circuit board therefor, which methodology is capable of revealing all pertinent internal structural features of e.g., flip-chip devices and contacts, and does not require costly, specialized, or customized equipment or apparatus.
The present invention, wherein a particular AOI of a BGA or flip-chip array of solder ball contacts/underlying vias of an IC die or chip or circuit board therefor is isolated and removed therefrom in elongated, narrow strip form and mounted on a transparent substrate, which in turn is held by a rotatable/tiltable gripping means, e.g., a rotatable/tiltable chuck, thereby facilitating performing visual and/or X-ray transmission or reflection inspection and/or analysis at high magnification levels, effectively addresses the need for improved methodology for performing failure analysis leading to development of improved, low ohmic resistance, well-aligned, void-free, adherent ball contact/underlying via structures. Further, the means and methodology provided by the present invention enjoy diverse utility in the manufacture of numerous and various types of electrical and electronic devices and/or components utilizing ball contact/via combinations.
An advantage of the present invention is an improved method for simple, reliable, and rapid sample preparation of raised ball contact/underlying via combinations or structures of electrical or electronic devices or components, for performing visual and/or X-ray transmission or reflection-type radiographic inspection and/or analysis thereof at high magnification.
Another advantage of the present invention is an improved method for simple, reliable, and rapid sample preparation of BGA or flip-chip raised contact/underlying via structures of particular AOI""s of semiconductor IC devices and/or package substrates therefor for performing high magnification, visual and/or X-ray inspection and/or analysis thereof.
Yet another advantage is an improved method for performing high magnification, visual and/or X-ray analysis of BGA or flip chip raised contact/underlying via structures of particular AOI""s of semiconductor IC devices and/or package substrates therefor.
Additional advantages and other features of the present invention will be set forth in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from the practice of the present invention. The advantages of the present invention may be realized as particularly pointed out in the appended claims.
According to one aspect of the present invention, the foregoing and other advantages are obtained in part by a method for performing inspection and/or analysis of raised electrical contacts and associated underlying vias of an electrical or electronic device or component, which method comprises the sequential steps of:
(a) providing an electrical or electronic device or component having opposing first and second major surfaces, the first major surface including an array of closely spaced-apart raised electrical contacts with respective underlying vias;
(b) selecting an area-of-interest (xe2x80x9cAOIxe2x80x9d) of said first major surface, the AOI including at least one of the raised electrical contacts with its respective underlying via;
(c) cutting through the electrical or electronic device or component from the first major surface to the second major surface thereof along two substantially parallel lines to separate therefrom an elongated strip including the AOI;
(d) mounting the elongated strip on a surface of a substrate; and
(e) inspecting and/or analyzing the AOI including the at least one electrical contact with respective underlying via for presence of offset or misalignment, voids, and delaminations.
According to embodiments of the present invention, step (a) comprises providing a semiconductor integrated circuit (xe2x80x9cICxe2x80x9d) device package or a package substrate having a two-dimensional, row-and-column, grid-shaped array of raised, ball grid array (xe2x80x9cBGAxe2x80x9d) or flip-chip contacts on the first major surface thereof, wherein adjacent rows and columns of the two-dimensional, grid-shaped arrays of raised contacts are spaced apart from about 200 to about 600 xcexcm and the elongated strip formed in step (c) has a narrow width of from about 5 to about 15 mils.
According to particular embodiments of the present invention, adjacent rows and columns of the two-dimensional, grid-shaped arrays are spaced apart about 400 xcexcm and the elongated strip formed in step (c) has a narrow width of about 10 mils.
According to embodiments of the present invention, step (b) comprises selecting at least one row or column of contacts of the two-dimensional, grid-shaped array of contacts as the AOI; and step (c) comprises cutting along two substantially parallel lines extending along the spaces between the selected at least one row or column of contacts and the adjacent rows or columns of contacts on both sides of the selected row or column, wherein step (c) comprises cutting utilizing a wire saw and further comprises trimming at least one end of the elongated strip to remove at least one unwanted area outside of the AOI.
According to embodiments of the present invention, step (d) comprises mounting the elongated strip including the AOI on an X-ray transparent substrate; and step (e) comprises inspecting and/or analyzing the AOI utilizing X-rays.
According to particular embodiments of the present invention, step (e) comprises performing an X-ray transmission or reflection-type radiographic inspection and/or analysis of the AOI, including, for example, positioning an X-ray source and an X-ray detector facing opposite surfaces of the elongated strip; step (d) comprises mounting the elongated strip on the substrate surface such that a first one of two opposing edge surfaces of the elongated strip which are formed as a result of performing cutting step (c) is adjacent the substrate surface and the second one of the two opposing edge surfaces of the strip formed as a result of performing cutting step (c) faces away from the substrate surface; and step (e) comprises, for example, positioning the X-ray source adjacent to and facing the second edge surface of the strip and positioning the X-ray detector beneath the substrate, facing the first edge surface of the strip.
According to other embodiments of the present invention, step (d) further includes installing the X-ray transparent substrate with the elongated strip mounted thereon in a rotatable/tiltable chuck or mount, the elongated strip being mounted on a glass or polymer-based substrate; and the mounting is accomplished by means of a transparent adhesive or double-sided transparent adhesive tape.
According to another aspect of the present invention, a method for performing inspection and/or analysis of raised electrical contacts and respective underlying vias of electrical devices and/or components comprises the sequential steps of:
(a) providing an electrical or electronic device or component having opposing first and second major surfaces, the first major surface including an array of closely spaced-apart raised electrical contacts with respective underlying vias, wherein the electrical device or component is a semiconductor integrated circuit (xe2x80x9cICxe2x80x9d) device package or package substrate having a two-dimensional, row-and-column, grid-shaped array of raised, ball-grid array (xe2x80x9cBGAxe2x80x9d) or flip-chip contacts on the first major surface thereof;
(b) selecting an area-of-interest (xe2x80x9cAOIxe2x80x9d) of the first major surface, the AOI comprising at least a portion of at least one of the rows and columns forming the grid-shaped array of contacts;
(c) cutting through the IC device package or circuit board from the first major surface to the second major surface thereof along two substantially parallel lines extending along the spaces between the portion of the selected at least one row or column of contacts and the adjacent rows or columns of contacts on both sides of the selected at least one row or column, to thereby separate therefrom an elongated strip including the AOI;
(d) trimming at least one end of the elongated strip to remove at least one unwanted area outside of the AOI;
(e) mounting the elongated strip including the AOI on a surface of an X-ray transparent substrate; and
(f) performing X-ray radiographic inspection and/or analysis of at least one raised contact with respective underlying via of the AOI for determining presence of any misalignment, voids, and delaminations.
According to embodiments of the invention, adjacent rows and columns of the two-dimensional, grid-shaped arrays of raised contacts are spaced apart from about 200 to about 600 xcexcm and the elongated strip formed in step (c) has a narrow width of from about 5 to about 15 mils.
According to further embodiments of the present invention, step (f) comprises performing X-ray transmission or reflection-type radiographic inspection and/or analysis of the AOL, including, for example, positioning an X-ray source and an X-ray detector as to face opposite surfaces of the elongated strip; step (e) comprises mounting the elongated strip on the surface of the X-ray transparent substrate such that one of two opposing edge surfaces of the elongated strip formed as a result of performing step (c) is adjacent the substrate surface and the second one of the two opposing edge surfaces of the elongated strip formed as a result of performing step (c) faces away from the substrate surface; and step (f) comprises positioning the X-ray source adjacent to and facing the second edge surface of the elongated strip and positioning the X-ray detector beneath the substrate, facing the first edge of the elongated strip, wherein step (e) further includes installing the X-ray transparent substrate with the elongated strip mounted thereon in a rotatable/tiltable chuck or mount.
Additional advantages and aspects of the present invention will become apparent to those skilled in the art from the following detailed description, wherein embodiments of the present invention are shown and described, simply by way of illustration of the best mode contemplated for practicing the present invention. As will be described, the present invention is capable of other and different embodiments, and its several details are susceptible of modification in various obvious respects, all without departing from the spirit of the present invention. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not limitative.